AMD, preparing for a big bang?

[Aggressor Prime]

AMD's last improvement in Cache 1 was from 250m to 180nm: 64KB to 128KB.

They should have had 256KB in their 130nm CPUs.
The 90nm CPUs will still use 128KB C1, though they should have 512KB.
But why the lay back?
So they can surprise Intel with a 1MB of Cache 1 with the 2005 launch of the 65nm K9s!

And for Cache 2:
180nm - 256KB
130nm - 1MB (Surprise combo w/ 64-Bit)
90nm - 2MB
65nm - 4MB

Intel Cache 3:
130nm - 2MB
90nm - 4MB
65nm - 8MB

AMD had to keep the Cache 2 high to continue to compete and to disguise the cache 1 boost.

Plus, the K9s should have Cache 3 (very large)!

My guess is, along with the dual cores (both having Hyper Threading), that the K9s will have 1MB of Cache 1, 4MB of Cache 2, and 8MB of Cache 3.

Also they will feature much more GHZ, AMD wants to win the 10GHz race.

Of course, this is not the Pentium EEs and Xeons that these High-End K9s are going against, AMD is attacking Intel's core, the Itanium!